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as1701, AS1706 1.6w audio power amplifiers data sheet www.austriamicrosystems.com revision 1.52 1 - 17 1 general description the as1701 and AS1706 are 1.6w bridged audio power amplifiers that provide excelle nt circuit reliability, provid- ing a very low-cost solution by eliminating external com- ponents when used with 2.7 to 5.5v-powered circuits. the devices have superb total harmonic distortion (thd) at high-power output and excellent power supply rejection with 4- and 8 -loads. integrated over-temper ature and over-current protection circuitry switch the devices off in case of an output short-circuit. a digital input allows the devices to auto- matically switch into shutdown mode. click- and pop- suppression circuitry reduces audible clicks and pops during power-up and shutdown. the gain (a v ) of the devices is controlled using external resistors. the as1701/AS1706 are available in an 8-pin msop package. figure 1. typical configuration block diagram 2 key features 2.7 to 5.5v (v dd ) single-supply operation very high psrr: greater than 65db @ 217hz thd+noise: 1.6w into 4 at 1% no output coupling capacitors required external gain configuration capability low-power shutdown mode: 10na click and pop suppression over-temperature and over-current protection operating temperature range: -40 to +85c 8-pin msop package 3 applications the as1701/AS1706 are ideal as audio front-ends for battery powered audio devices such as mp3 and cd players, mobile phones, pdas, portable dvd players, and any other hand-held battery-powered device. rl = 4 or 8 40k 40k 50k 50k v dd /2 bias 20k r f v dd + ? c s 10f av = -1 c b 0.1 to 1f + + as1701/ AS1706 gnd 7 2 bias 8 out- 5 out+ 6 v dd 1 shdn 20k r in + ? c in 0.33f audio input 4 in- 3 in+
www.austriamicrosystems.com revision 1.52 2 - 17 as1701, AS1706 data sheet - pinout 4 pinout pin assignments figure 2. pin assignment ? 8-pin msop package (top view) pin descriptions table 1. pin descriptions pin name description 1shdn shutdown . connect this pin to gnd for the as1701 (active-high); connect this pin to v dd for the AS1706 (active-low). 2bias dc bias bypass 3in+ non-inverting input 4in- inverting input 5out+ positive differential output 6v dd power supply 7gnd ground 8out- negative differential output 1 shdn as1701/ AS1706 2 bias 3 in+ 4 in- 5 out+ 6 v dd 7 gnd 8 out-
www.austriamicrosystems.com revision 1.52 3 - 17 as1701, AS1706 data sheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the de vice at these or any other cond itions beyond those indicated in electrical character- istics on page 4 is not implied. exposure to absolute maximum ra ting conditions for extended periods may affect device reliability. table 2. absolute maximum ratings parameter min max unit comments v dd to gnd -0.3 +7 v any other pin to gnd -0.3 v dd + 0.3 v input current (latchup immunity) -100 100 ma jedec 78 continuous power dissipation 362 mw t amb = 70oc, derate 4.5mw/oc above +70oc electro-static discharge (esd) 1 kv hbm mil-std883e 3015.7 methods operating temperature range (t amb )-40 +85 oc storage temperature range -65 +150 oc soldering conditions +260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std- 020c ?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices?.
www.austriamicrosystems.com revision 1.52 4 - 17 as1701, AS1706 data sheet - electrical characteristics 6 electrical characteristics all specifications are 100% tested at t amb = +25oc. 5v operation v dd = 5v, r l = , c bias = 0.1f to gnd, shdn = gnd, t amb +25 o c (unless otherwise specified). 3v operation v dd = 3v, r l = , c bias = 0.1f to gnd, shdn = gnd, t amb +25 o c (unless otherwise specified). table 3. dc electrical characteristics ? 5v operation parameter symbol conditions min typ max units supply voltage range v dd inferred from psrr test 2.7 5.5 v supply current 1 1. quiescent power supply current is sp ecified and tested without loads on the outputs. quiescent power supply current depends on the offset voltage when a practical load is connected to the device. i dd t amb = -40 to +85oc 6.8 10.4 ma shutdown supply current i shdn shdn = v dd 0.01 1 a shdn threshold v ih v dd x 0.7 v v il v dd x 0.3 common-mode bias voltage 2 2. common-mode bias voltage is the voltage on pin bias and is nominally v dd /2. vbias v dd /2 - 5% v dd /2 v dd /2 + 5% v output offset voltage v os av = 2, in- = out+, in- = bias 1 10 mv power supply rejection ratio psrr inputs grounded, v ripple = 200mvp-p, r l = 4 , v in- = v in+ = v bias 217hz 65 db 1khz 63 output power 3 3. guaranteed by design. p out r l = 4 , thd+n = 1%, f in = 1khz 1.6 w r l = 8 , thd+n = 1%, f in = 1khz 0.8 1.2 total harmonic distortion+noise thd+n a v = 2, r l = 4 , f in = 1khz, p out = 1.3w 0.09 % a v = 2, r l = 8 , f in = 1khz, p out = 1w 0.05 thermal-shutdown threshold 145 oc thermal-shutdown hysteresis 9 oc power-up/enable from shutdown time t pu 150 ms shutdown time t shdn 1s turn-off transient v pop 20 mv table 4. dc electrical characteristics ? 3v operation parameter symbol conditions min typ max units supply current 1 1. quiescent power supply current is sp ecified and tested without loads on the outputs. quiescent power supply current depends on the offset voltage when a practical load is connected to the device. i dd t amb = -40 to +85oc 6 10 ma shutdown supply current i shdn shdn = v dd 0.01 1 a output power 2 2. guaranteed by design. p out r l = 4 , thd+n = 1%, f in = 1khz 0.6 w r l = 8 , thd+n = 1%, f in = 1khz 0.4 power supply rejection ratio psrr v ripple = 200mvp-p, r l = 8 , v in- = v in+ = v bias 217hz 65 db 1khz 63 total harmonic distortion +noise thd+n a v = 2, r l = 4 , f in = 1khz, p out = 500mw 0.09 % a v = 2, r l = 8 , f in = 1khz, p out = 350mw 0.06
www.austriamicrosystems.com revision 1.52 5 - 17 as1701, AS1706 data sheet - typical operating characteristics 7 typical operating characteristics figure 3. thd + noise vs. output power; figure 4. thd + noise vs. output power; v dd = 3v, r l = 4 , av = 2 v dd = 3v, r l = 8 , av = 2 figure 5. thd + noise vs. output power; figure 6. thd + noise vs. output power; v dd = 3v, r l = 4 , av = 4 v dd = 3v, r l = 8 , av = 4 figure 7. thd + noise vs. output power; figure 8. thd + noise vs. output power; v dd = 5v, r l = 4 , av = 2 v dd = 5v, r l = 8 , av = 2 0.001 0.01 0.1 1 10 100 0 100 200 300 400 500 600 output power (mw) thd+n (%) 0.001 0.01 0.1 1 10 100 0 100 200 300 400 500 600 700 800 output power (mw) thd+n (%) f in = 1khz f in = 100hz f in = 10khz f in = 1khz f in = 10khz f in = 100hz 0.001 0.01 0.1 1 10 100 0 100 200 300 400 500 600 output power (mw) thd+n (%) 0.001 0.01 0.1 1 10 100 0 100 200 300 400 500 600 700 800 output power (mw) thd+n (%) fin = 1khz f in = 100hz f in = 10khz f in = 100hz f in = 10khz f in = 1khz 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 output power (w) thd+n (%) 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 output power (mw) thd+n (%) f in = 1khz f in = 10khz f in = 100hz f in = 1khz f in = 100hz f in = 10khz
www.austriamicrosystems.com revision 1.52 6 - 17 as1701, AS1706 data sheet - typical operating characteristics figure 9. thd + noise vs. output power; figure 10. thd + noise vs. output power; v dd = 5v, r l = 4 , av = 4 v dd = 5v, r l = 8 , av = 4 figure 11. thd + noise vs. frequency; figure 12. thd + noise vs. frequency; v dd = 3v, r l = 4 , av = 2 v dd = 3v, r l = 8 , av = 2 figure 13. thd + noise vs. frequency; figure 14. thd + noise vs. frequency; v dd = 5v, r l = 4 , av = 2 v dd = 5v, r l = 8 , av = 2 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 output power (w) thd+n (%) 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 output power (w) thd+n (%) f in = 1khz f in = 10khz f in = 100hz f in = 1khz f in = 100hz f in = 10khz 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd+n (%) 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd+n (%) 250mw 500mw 200mw 350mw 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd+n (%) 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd+n (%) 500mw 1.4w 300mw 700mw
www.austriamicrosystems.com revision 1.52 7 - 17 as1701, AS1706 data sheet - typical operating characteristics figure 15. thd + noise vs. frequency; figure 16. thd + noise vs. frequency; v dd = 5v, r l = 4 , av = 4 v dd = 5v, r l = 8 , av = 4 figure 17. power dissipation vs. p out ; v dd = 5v, figure 18. power dissipation vs. p out ; v dd = 3v av = 2, r l = 4 , f = 1khz, thd+n<1% av = 2, r l = 4 , f = 1khz, thd+n<1% figure 19. power dissipation vs. p out ; v dd = 5v, figure 20. power dissipation vs. p out ; v dd = 3v av = 2, r l = 8 , f = 1khz, thd+n<1% av = 2, r l = 8 , f = 1khz, thd+n<1% 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd+n (%) 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd+n (%) 500mw 1.4w 500mw 1w 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.3 0.6 0.9 1.2 1.5 1.8 output power (w) power dissipation (w) 0 100 200 300 400 500 600 700 0 100 200 300 400 500 600 700 output power (mw) power dissipation (mw) 0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 output power (w) power dissipation (w) 0 50 100 150 200 250 300 350 0 100 200 300 400 500 output power (mw) power dissipation (mw)
www.austriamicrosystems.com revision 1.52 8 - 17 as1701, AS1706 data sheet - typical operating characteristics figure 21. output power vs. supply voltage; figure 22. output power vs. supply voltage; f = 1khz, r l = 4 , av = 2 f = 1khz, r l = 8 , av = 2 figure 23. psrr vs. frequency; v ripple = 200mv pp figure 24. psrr vs. frequency; v ripple = 200mv pp c bp = c in = 1f, r l = 4 , av = 2, in1 grounded c bp = c in = 1f, r l = 4 , av = 2, floating input figure 25. psrr vs. frequency; v ripple = 200mv pp figure 26. supply current vs. c bp = c in = 1f, r l = 4 , av = 2, inputs grounded temperature 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.5 3.5 4.5 5.5 supply voltage (v) output power (w) 0 0.5 1 1.5 2 2.5 3 2.5 3.5 4.5 5.5 supply voltage (v) output power (w) p out @10% (w) p out @1% (w) p out @10% (w) p out @1% (w) -80 -70 -60 -50 -40 -30 -20 10 100 1000 10000 100000 frequency (hz) psrr (db) -80 -70 -60 -50 -40 -30 -20 10 100 1000 10000 100000 frequency (hz) psrr (db) v dd = 5v v dd = 3v v dd = 5v v dd = 3v -80 -70 -60 -50 -40 -30 -20 10 100 1000 10000 100000 frequency (hz) psrr (db) 5 5.5 6 6.5 7 7.5 8 -45-20 0 204060708090 temperature (c) supply current (ma ) v dd = 5v v dd = 3v v dd = 5v v dd = 3v
www.austriamicrosystems.com revision 1.52 9 - 17 as1701, AS1706 data sheet - typical operating characteristics figure 27. output power vs. load resistance; figure 28. output power vs. load resistance; v dd = 5v v dd = 3v 0 100 200 300 400 500 600 700 800 1 10 100 load resistance ( ) output power (w) 0 0.4 0.8 1.2 1.6 2 2.4 1 10 100 load resistance ( ) output power (w) p out @thd = 10% p out @thd = 1% p out @thd = 10% p out @thd = 1%
www.austriamicrosystems.co m revision 1.52 10 - 17 as1701, AS1706 data sheet - detailed description 8 detailed description the as1701/AS1706 bridged audio power-amplifiers can deliver 1.6w into 4 while operating from a single 2.7 to 5.5v supply. the devices consist of two high-output-current operational amplifiers configured as a bridge-tied load (btl) amplifier as shown in figure 29 . figure 29. as1701 typical configuration block diagram the gain of the devices is set by the closed-loop gain of the input operational amplifier. as shown in figure 29 , the out- put of the first amplifier serves as the input to the second amplifier, which is configured as an inverting unity-gain fol- lower in both devices. this results in two outputs, identical in magnitude, and 180 out-of-phase. bias the devices operate from a single 2.7 to 5.5v supply a nd contain an internally generated, common-mode bias voltage of: v dd /2 (eq 1) referenced to ground. bias provides click-and-pop suppression and sets the dc bias level for the audio outputs. for selection of the value for the bias bypass capacitor (c bias ), see bias bypass capacitor on page 13 . pin bias is inter- nally connected to the non-inverting input of one amplifier, and should be connected to the non-inverting input of the other amplifier for proper signal biasing (see figure 29) . shutdown the integrated 100na, low-power shutdown circuitry reduces quiescent current consumption. as shutdown com- mences, the bias circuitry is automatically disabled, the device outputs go high impedance, and bias is driven to gnd. note: connect shdn to gnd for the as1701 (active-high); connect shdn to v dd for the AS1706 (active-low). current limit the as1701/AS1706 current limit circuitry protects the device during output short-circuit and overload conditions. when both amplifier outputs are shorted to either v dd or gnd, the short-circuit prot ection is enabled and the amplifier enters a pulsing mode, reducing the average output current to a safe level. the amplifier remains in this mode until the short-circuit or overload condition is corrected. 40k r l 4 or 8 40k 50k 50k v dd /2 bias 20k r in 20k r f v dd + ? + ? c in 0.33f audio input c s 0.1f av = -1 c b 0.1 to 1.0f + + as1701 in- in+ bias shdn gnd out- out+ v dd
www.austriamicrosystems.co m revision 1.52 11 - 17 as1701, AS1706 data sheet - application information 9 application information btl amplifier the as1701/AS1706 are designed to drive loads differentially in a bridge-tied load (btl) configuration. figure 30. bridge-tied load configuration driving the load differentially doubles the output voltage (illustrated in figure 30 ) compared to a single-ended amplifier under similar conditions. thus, the differential gain of the device is twice the closed-loop gain of the input amplifier. the effective gain is calculated by: substituting 2 x v out(p-p) into (eq 3) and (eq 4) yields four times the output power due to doubling of the output volt- age. since the differential outputs are biased at mid-supply, ther e is no net dc voltage across the load, eliminating the need for the large, expensive, performance degrading dc-blocki ng capacitors required by single-ended amplifiers. power dissipation and heat sinking normally, the devices dissipate a significant amount of power. the maximum power dissipation is given in ta b l e 2 as continuous power dissipation, or it can be calculated by: where t j(max) is +150c, t amb (see ta b l e 2 ) is the ambient temperature, and ja is the reciprocal of the derating fac- tor in c/w. the increased power delivered by a btl configuration normally results in increased intern al power dissipation versus a single-ended configuration. the maximum internal power dissipation for a given v dd and load is calculated by: +1 -1 v out(p-p) v out(p-p) 2 x v out(p-p) a vd = 2 x r in (eq 2) r f v rms = 2 2 (eq 3) v out(p-p) p out = r l (eq 4) v rms 2 p disspkf(max) = ja (eq 5) t j(max) -t a p disspkf(max) = 2 r l (eq 6) 2v dd 2
www.austriamicrosystems.co m revision 1.52 12 - 17 as1701, AS1706 data sheet - application information if the internal power dissipation exceeds the maximum allowed for a given package, power dissipation can be reduced by increasing the ground plane heat-sinking capabilities and increasing the size of the traces to the device (see layout and grounding considerations on page 14) . additionally, reducing v dd , increasing load impedance, and decreasing ambient temperature can reduce device power dissipation. the integrated thermal-overload protection circuitry limits th e total device power dissipation. note that if the junction temperature is +145c, the integrated thermal-overload protection ci rcuitry will disable the amplifier output stage. if the junction temperature is reduced by 9oc, the amplifiers will be re-enabled. note: a pulsing output under continuous thermal overload results as the device heats and cools. efficiency efficiency of the as1701/AS1706 is calculated by taking the ratio of the power delivered to the load, to the power con- sumed from the power supply. output power is calculated by: where v peak is half the peak-to-peak output voltage. in btl amplifier configurations, the supply current waveform is a full-wave rectified sinusoid with the magnitude proportional to the peak output voltage and load. calculate the supply current and power drawn from the power supply by: the efficiency of the as1701/AS1706 is: component selection gain-setting resistors external feedback resistors r f and r in (see figure 1 on page 1) set the gain of the device as: optimum output offset is achieved when r f = 20k . device gain can be varied by changing the value of r in . if used in a high-gain configuration (greater than 8v/v), a feedback capacitor may be required to maintain stability (see figure 1 on page 1) . c f and r f limit the bandwidth of the device, preventing high-frequency oscillations. note: ensure that the pole created by c f and r f is not within the frequency band of interest. p out = 2 r l (eq 7) v peak 2 i dd = r l (eq 8) 2v peak p in = v dd r l (eq 9) 2v peak = (eq 10) 2v dd r in p out = p out r l 2 a vd = 2 x r in (eq 11) r f
www.austriamicrosystems.co m revision 1.52 13 - 17 as1701, AS1706 data sheet - application information input filter input capacitor c in (if used), in conjunction with r in , forms a high-pass filter that removes the dc bias from an incom- ing signal. c in allows the amplifier to bias the signal to an optimum dc level. assuming zero source impedance, the - 3db point of the high-pass filter is given by: select the value for r in as specified in gain-setting resistors on page 12 . choose the value for c in such that f -3db is well below the lowest frequency of interest. setting f -3db too high can affect the low-frequency response of the device. capacitors with dielectrics that have low-voltage coefficients su ch as tantalum or aluminum electrolytic should be used, since capacitors with high-voltage coefficients, such as ceramics, can increase distortion at low frequencies. note: other considerations when designing the input filter include the overall constraints of the system, the frequency band of interest, and click-and-pop suppression. although hi-fi audio specifies a flat gain response between 20hz and 20khz, portable voice reproduction devices su ch as mobile phones and two-way radios only need address the frequency range of the human voice (~ 300h z to 3.5khz). additionally, speakers used in portable devices typically have poor response below 150hz. in practice, the input filter may not need to be designed for the 20hz to 20khz range, which could save pcb space and design costs since only small capacitors would be required. bias bypass capacitor the bias bypass capacitor, c bias , improves psrr and thd+n by reducing power supply noise at the common-mode bias node, and serves as the primar y click- and pop-suppression component. c bias is fed from an internal 25k source, and controls the rate at which the common-mode bias voltage rises at power-up and falls during shutdown. for optimal click- and pop-suppression, ensure that the input capacitor (c in ) is fully charged (ten time constants) before c bias . the value of c bias for best click- and pop-suppression is given by: note: a larger c bias value yields higher psrr. click- and pop-less operation ac-coupling capacitors (c in ) along with c bias facilitate click- and pop-less power-up and shutdown. the value of c bias determines the rate at which the mid-rail bias voltage rises on power-up and falls when entering shutdown. on power-up, c in is charged to its quiescent dc voltage through the r f from the output. the current generated cre- ates a voltage transient at the amplifier output, which can result in an audible pop. minimizing the value of c in reduces this effect, optimizing click-and-pop suppression. for more information see bias on page 10 and bias bypass capacitor on page 13 . supply bypassing proper power supply bypassing ? connect a 0.1f ceramic ca pacitor in parallel with a 10f ceramic capacitor from v dd to gnd ? will ensure low-noise, low-distortion perform ance of the device. additional bulk capacitance can be added as required. note: place the capacitors as close to the device as possible. volume control the addition of a digital potentiometer (as1500 family) used as an input attenuator, can provide simple volume control for the as1701/AS1706. connect the high terminal of the as150x to the audio input, the low terminal to ground and the as150x wiper to c in (as shown in figure 31 ). setting the wiper to the top position passes the audio signal unattenuated; setting the wiper to the lowest position fully attenuates the input. f -3db = (eq 12) 1 2 r in c in c bias 10 25k (eq 13) c in r in
www.austriamicrosystems.co m revision 1.52 14 - 17 as1701, AS1706 data sheet - application information figure 31. volume control configuration for more information on the as1500 family of digital potentiometers, refer to the latest version of the as150 x data sheet , available from the austriamicrosystems website http ://www.austriamicrosystems.com. layout and groundi ng considerations well designed pc board layout is essential for optimizing device performance. use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance and route heat away from the device. sufficient grounding improves audio performance, minimizes crosstalk between channels, and prevents digital switch- ing noise from coupling onto the audio signal. refer to power dissipation and heat sinking on page 11 for heat sinking considerations. as1701/ AS1706 r f audio input c in r in as150x h l 8 out- 5 out+ 4 in-
www.austriamicrosystems.co m revision 1.52 15 - 17 as1701, AS1706 data sheet - package drawings and markings 10 package drawings and markings figure 32. 8-pin msop package symbol millimeters tolerance symbol millimeters tolerance a 1.10 max b 0.33 +0.07 to -0.08 a1 0.10 0.05 b1 0.30 0.05 a2 0.86 0.08 c 0.18 0.05 d 3.00 0.10 c1 0.15 +0.03 to -0.02 d2 2.95 0.10 13.0o 3.0o e4.90 0.15 2 12.0o 3.0o e1 3.00 0.10 3 12.0o 3.0o e2 2.95 0.10 l 0.55 0.15 e3 0.51 0.13 l1 0.95 bsc e4 0.51 0.13 aaa 0.10 r 0.15 +0.15 to -0.08 bbb 0.08 r1 0.15 +0.15 to -0.08 ccc 0.25 t1 0.31 0.08 e .65 bsc t2 0.41 0.08 s .525 bsc notes: 1. all dimensions are in millimeters (ang le in degrees), unless otherwise specified. 2. datums b and c to be determined at datum plane h. 3. dimensions d and e1 are to be determined at datum plane h. 4. dimensions d2 and e2 are for top package and d and e1 are for bottom package. 5. cross section a-a to be determined at 0.13 to 0.25mm from the lead tip. 6. dimensions d and d2 do not include mold flash, protrusion, or gate burrs. 7. dimension e1 and e2 do not include interlead flash or protrusion.
www.austriamicrosystems.co m revision 1.52 16 - 17 as1701, AS1706 data sheet - ordering information 11 ordering information the devices are available as the standard products shown in table 5 . table 5. ordering information part number description shdn delivery form package type as1701 1.6w audio power amplifier active-high tube 8-pin msop as1701-t 1.6w audio power amplifier active-high tape and reel 8-pin msop AS1706 1.6w audio power amplifier active-low tube 8-pin msop AS1706-t 1.6w audio power amplifier active-low tape and reel 8-pin msop
www.austriamicrosystems.co m revision 1.52 17 - 17 as1701, AS1706 data sheet copyrights copyright ? 1997-200 7, austriamicrosystems ag, schloss premstaett en, 8141 unterpremstae tten, austria-europe. trademarks registered ?. all rights reserved. the materi al herein may not be reproduced, adapted, merged, trans- lated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by t he warranty and patent indemni fication provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriami- crosystems ag reserves the right to chang e specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems ag for current information. this product is intended for use in normal commercial a pplications. applications r equiring extended temperature range, unusual environmental requirements, or high reliability app lications, such as military, medical life-support or life- sustaining equipment are specifically not recommended withou t additional processing by austriamicrosystems ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or ar ising out of the furnishing, performance or use of the tech- nical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag a-8141 schloss premstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact

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